本文章旨在評(píng)估使用 Zephyr RTOS 在 Renesas FPB-RA6E2 開發(fā)板上實(shí)現(xiàn) ADC（模數(shù)轉(zhuǎn)換器）、DAC（數(shù)模轉(zhuǎn)換器）和 PWM（脈寬調(diào)制）功能的應(yīng)用。評(píng)估內(nèi)容包括設(shè)備樹配置、驅(qū)動(dòng)初始化流程、主程序邏輯的詳細(xì)解析，以及實(shí)驗(yàn)現(xiàn)象與數(shù)據(jù)分析。

1. 硬件連接與引腳定義

本實(shí)驗(yàn)涉及 ADC、DAC 和 PWM 的硬件資源，以下是關(guān)鍵引腳及其功能：

2. 軟件環(huán)境配置

2.1 Device Tree Overlay (app.overlay)

設(shè)備樹用于定義外設(shè)的物理引腳綁定和初始狀態(tài)。以下是關(guān)鍵配置：

ADC 配置

&adc0 {
    status = "okay";
    pinctrl-0 = < &adc0_default >;
    pinctrl-names = "default";

    channel@0 {
        reg = < 0 >;
        zephyr,gain = "ADC_GAIN_1";
        zephyr,reference = "ADC_REF_INTERNAL";
        zephyr,acquisition-time = < ADC_ACQ_TIME_DEFAULT >;
        zephyr,resolution = < 12 >;
    };
};
};

};

#### DAC 配置

&dac0 {
    status = "okay";
    pinctrl-0 = < &dac0_default >;
    pinctrl-names = "default";
};

&pinctrl {
    dac0_default: dac0_default {
        group1 {
            psels = < RA_PSEL(RA_PSEL_DAC, 0, 14) >;
            renesas,analog-enable;
        };
    };
};
};

};

#### PWM 配置

&pwm1 {
    status = "okay";
};

pwmleds {
    compatible = "pwm-leds";
    pwm_led_p408: pwm_led_p408 {
        pwms = < &pwm1 1 PWM_MSEC(1) PWM_POLARITY_NORMAL >;
    };
};
};

};

### 2.2 Kconfig 配置 (prj.conf)

確保啟用了 ADC、DAC 和 PWM 驅(qū)動(dòng)支持：

CONFIG_ADC=y
CONFIG_DAC=y
CONFIG_PWM=y
CONFIG_LOG=y

3. 代碼邏輯分析

3.1 核心流程

ADC 流程

/*
 * Copyright (c) 2020 Libre Solar Technologies GmbH
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include < inttypes.h >
#include < stddef.h >
#include < stdint.h >

#include < zephyr/device.h >
#include < zephyr/devicetree.h >
#include < zephyr/drivers/adc.h >
#include < zephyr/kernel.h >
#include < zephyr/sys/printk.h >
#include < zephyr/sys/util.h >

#if !DT_NODE_EXISTS(DT_PATH(zephyr_user)) || 
	!DT_NODE_HAS_PROP(DT_PATH(zephyr_user), io_channels)
#error "No suitable devicetree overlay specified"
#endif

#define DT_SPEC_AND_COMMA(node_id, prop, idx) 
	ADC_DT_SPEC_GET_BY_IDX(node_id, idx),

/* Data of ADC io-channels specified in devicetree. */
static const struct adc_dt_spec adc_channels[] = {
	DT_FOREACH_PROP_ELEM(DT_PATH(zephyr_user), io_channels,
			     DT_SPEC_AND_COMMA)
};

int main(void)
{
	int err;
	uint32_t count = 0;
	uint16_t buf;
	struct adc_sequence sequence = {
		.buffer = &buf,
		/* buffer size in bytes, not number of samples */
		.buffer_size = sizeof(buf),
	};

	/* Configure channels individually prior to sampling. */
	for (size_t i = 0U; i < ARRAY_SIZE(adc_channels); i++) {
		if (!adc_is_ready_dt(&adc_channels[i])) {
			printk("ADC controller device %s not readyn", adc_channels[i].dev- >name);
			return 0;
		}

		err = adc_channel_setup_dt(&adc_channels[i]);
		if (err < 0) {
			printk("Could not setup channel #%d (%d)n", i, err);
			return 0;
		}
	}

	while (1) {
		printk("ADC reading[%u]:n", count++);
		for (size_t i = 0U; i < ARRAY_SIZE(adc_channels); i++) {
			int32_t val_mv;

			printk("- %s, channel %d: ",
			       adc_channels[i].dev- >name,
			       adc_channels[i].channel_id);

			(void)adc_sequence_init_dt(&adc_channels[i], &sequence);

			err = adc_read_dt(&adc_channels[i], &sequence);
			if (err < 0) {
				printk("Could not read (%d)n", err);
				continue;
			}

			/*
			 * If using differential mode, the 16 bit value
			 * in the ADC sample buffer should be a signed 2's
			 * complement value.
			 */
			if (adc_channels[i].channel_cfg.differential) {
				val_mv = (int32_t)((int16_t)buf);
			} else {
				val_mv = (int32_t)buf;
			}
			printk("%"PRId32, val_mv);
			err = adc_raw_to_millivolts_dt(&adc_channels[i],
						       &val_mv);
			/* conversion to mV may not be supported, skip if not */
			if (err < 0) {
				printk(" (value in mV not available)n");
			} else {
				printk(" = %"PRId32" mVn", val_mv);
			}
		}

		k_msleep(1000);
	}
	return 0;
}

1. 初始化 ADC 驅(qū)動(dòng)并配置通道。
2. 調(diào)用 adc_read 函數(shù)讀取模擬輸入值。
3. 將讀取的數(shù)字值轉(zhuǎn)換為實(shí)際電壓（基于參考電壓和分辨率）。

DAC 流程

/*
 * Copyright (c) 2020 Libre Solar Technologies GmbH
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include < zephyr/kernel.h >
#include < zephyr/sys/printk.h >
#include < zephyr/drivers/dac.h >

#define ZEPHYR_USER_NODE DT_PATH(zephyr_user)

#if (DT_NODE_HAS_PROP(ZEPHYR_USER_NODE, dac) && 
	DT_NODE_HAS_PROP(ZEPHYR_USER_NODE, dac_channel_id) && 
	DT_NODE_HAS_PROP(ZEPHYR_USER_NODE, dac_resolution))
#define DAC_NODE DT_PHANDLE(ZEPHYR_USER_NODE, dac)
#define DAC_CHANNEL_ID DT_PROP(ZEPHYR_USER_NODE, dac_channel_id)
#define DAC_RESOLUTION DT_PROP(ZEPHYR_USER_NODE, dac_resolution)
#else
#error "Unsupported board: see README and check /zephyr,user node"
#define DAC_NODE DT_INVALID_NODE
#define DAC_CHANNEL_ID 0
#define DAC_RESOLUTION 0
#endif

static const struct device *const dac_dev = DEVICE_DT_GET(DAC_NODE);

static const struct dac_channel_cfg dac_ch_cfg = {
	.channel_id  = DAC_CHANNEL_ID,
	.resolution  = DAC_RESOLUTION,
#if defined(CONFIG_DAC_BUFFER_NOT_SUPPORT)
	.buffered = false,
#else
	.buffered = true,
#endif /* CONFIG_DAC_BUFFER_NOT_SUPPORT */
};

int main(void)
{
	if (!device_is_ready(dac_dev)) {
		printk("DAC device %s is not readyn", dac_dev- >name);
		return 0;
	}

	int ret = dac_channel_setup(dac_dev, &dac_ch_cfg);

	if (ret != 0) {
		printk("Setting up of DAC channel failed with code %dn", ret);
		return 0;
	}

	printk("Generating sawtooth signal at DAC channel %d.n",
		DAC_CHANNEL_ID);
	while (1) {
		/* Number of valid DAC values, e.g. 4096 for 12-bit DAC */
		const int dac_values = 1U < < DAC_RESOLUTION;

		/*
		 * 1 msec sleep leads to about 4 sec signal period for 12-bit
		 * DACs. For DACs with lower resolution, sleep time needs to
		 * be increased.
		 * Make sure to sleep at least 1 msec even for future 16-bit
		 * DACs (lowering signal frequency).
		 */
		const int sleep_time = 4096 / dac_values > 0 ?
			4096 / dac_values : 1;

		for (int i = 0; i < dac_values; i++) {
			ret = dac_write_value(dac_dev, DAC_CHANNEL_ID, i);
			if (ret != 0) {
				printk("dac_write_value() failed with code %dn", ret);
				return 0;
			}
			k_sleep(K_MSEC(sleep_time));
		}
	}
	return 0;
}

1. 初始化 DAC 驅(qū)動(dòng)并設(shè)置通道分辨率。
2. 調(diào)用 dac_write_value 函數(shù)輸出模擬電壓。
3. 通過循環(huán)生成鋸齒波或三角波。

PWM 流程

/*
 * Copyright (c) 2016 Intel Corporation
 * Copyright (c) 2020 Nordic Semiconductor ASA
 *
 * SPDX-License-Identifier: Apache-2.0
 */

#include < zephyr/kernel.h >
#include < zephyr/sys/printk.h >
#include < zephyr/device.h >
#include < zephyr/drivers/pwm.h >
 
/* 
 * 獲取設(shè)備樹中的 pwm-led0 別名
 * 注意：根據(jù)之前的 Overlay 配置，這對(duì)應(yīng) P408 引腳
 */
static const struct pwm_dt_spec pwm_dev = PWM_DT_SPEC_GET(DT_ALIAS(pwm_led0));
 
 
#define PERIOD PWM_MSEC(1)
 
/* 每次循環(huán)增加的占空比百分?jǐn)?shù) */
#define STEP   5
 
/* 每次速度變化的間隔時(shí)間 (毫秒) */
#define SLEEP_MS   500
 
int main(void)
{
	int ret;
	uint8_t duty_cycle = 0;   // 當(dāng)前占空比 (0-100)
	uint32_t pulse_width = 0; // 實(shí)際脈寬時(shí)間
 
	if (!pwm_is_ready_dt(&pwm_dev)) {
		printk("Error: PWM device %s is not readyn",
		       pwm_dev.dev- >name);
		return 0;
	}
 
	printk("Starting pwm control on channel %d...n", pwm_dev.channel);
 
	ret = pwm_set_dt(&pwm_dev, PERIOD, 0);
	if (ret) {
		printk("Error: PWM device does not support period %lun", PERIOD);
		return 0;
	}
 
	while (1) {
		/* 計(jì)算脈寬: (周期 * 百分比) / 100 */
		pulse_width = (uint32_t)((uint64_t)PERIOD * duty_cycle / 100U);
 
		/* 設(shè)置 PWM: 周期固定，改變脈寬 */
		ret = pwm_set_dt(&pwm_dev, PERIOD, pulse_width);
		if (ret) {
			printk("Error %d: failed to set pulse widthn", ret);
			return 0;
		}
 
		/* 增加速度 */
		duty_cycle += STEP;
 
		/* 如果超過 100%，重置為 0 */
		if (duty_cycle > 100) {
			duty_cycle = 0; 
            printk(" > > Resetting cycle <

1. 初始化 PWM 驅(qū)動(dòng)并設(shè)置周期。
2. 調(diào)用 pwm_set_dt 函數(shù)調(diào)整占空比。
3. 通過循環(huán)實(shí)現(xiàn)占空比的動(dòng)態(tài)變化。

3.2 關(guān)鍵 API 使用

以下是代碼中使用的關(guān)鍵 API：

ADC

int adc_read(const struct device *dev, const struct adc_sequence *sequence);

• dev: ADC 設(shè)備句柄。
• sequence: 包含通道、緩沖區(qū)和采樣時(shí)間的配置結(jié)構(gòu)體。

DAC

int dac_write_value(const struct device *dev, uint8_t channel, uint32_t value);

• dev: DAC 設(shè)備句柄。
• channel: DAC 通道 ID。
• value: 輸出的數(shù)字值。

PWM

int pwm_set_dt(const struct pwm_dt_spec *spec, uint32_t period, uint32_t pulse);

• spec: PWM 設(shè)備樹綁定結(jié)構(gòu)體。
• period: PWM 周期（納秒）。
• pulse: PWM 脈寬（納秒）。

4. 實(shí)驗(yàn)現(xiàn)象與數(shù)據(jù)分析

4.1 ADC 數(shù)據(jù)采集

終端應(yīng)顯示如下數(shù)據(jù)流：

ADC reading[0]:
* adc@40170000, channel 0: 0 = 0 mV

4.2 DAC 輸出波形

• 初始狀態(tài) : DAC 輸出 0V。
• 運(yùn)行時(shí) : 生成鋸齒波或三角波，頻率由延時(shí)控制。
• 視覺效果 : 使用示波器觀測(cè) P014 引腳，應(yīng)看到穩(wěn)定的波形。
  

4.3 PWM 占空比變化

• 初始狀態(tài) : PWM 輸出低電平。
• 運(yùn)行時(shí) : 占空比從 0% 到 100% 循環(huán)變化。
• 視覺效果 : 使用 LED 或示波器觀測(cè) P408 引腳，亮度或波形應(yīng)隨占空比變化。

5. 測(cè)評(píng)總結(jié)

本程序成功演示了 Renesas RA6E2 在 Zephyr RTOS 下的 ADC、DAC 和 PWM 外設(shè)控制。通過閉環(huán)測(cè)試驗(yàn)證了數(shù)模轉(zhuǎn)換的準(zhǔn)確性，并展示了嵌入式系統(tǒng)中“數(shù)字-模擬-數(shù)字”的完整轉(zhuǎn)換過程。代碼結(jié)構(gòu)清晰，適配了最新的驅(qū)動(dòng) API，適用于初學(xué)者學(xué)習(xí)和開發(fā)者快速驗(yàn)證硬件功能。