高速 CMOS 邏輯 9 位奇偶校驗發(fā)生器/校驗器
| Number of channels (#) | 2 |
| Technology Family | HC |
| Input type | Standard CMOS |
| Output type | Push-Pull |
| Features | Balanced outputs, High speed (tpd 10-50ns), Positive input clamp diode |
- Typical Propagation Delay = 17ns at VCC = 5V, CL = 15pF, TA = 25°C
- Replaces LS180 Types
- Easily Cascadable
- Fanout (Over Temperature Range)
- Standard Outputs...10 LSTTL Loads
- Bus Driver Outputs...15 LSTTL Loads
- Wide Operating Temperature Range... –55°C to 125°C
- Balanced Propagation Delay and Transition Times
- Significant Power Reduction Compared to LSTTL Logic ICs
- HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
- HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility, VIL = 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il
1μA at VOL, VOH
Data sheet acquired from Harris Semiconductor
The ?HC280 and ?HCT280 are 9-bit odd/even parity, generator checker devices. Both even and odd parity outputs are available for checking or generating parity for words up to nine bits long. Even parity is indicated (
E output to any input of an additional HC/HCT280 parity checker.
