In the past decade the wireless industry has attracted the attention of
many researchers, industrialists, and even investors. The current exponential
growth of the wireless market requires wireless transceivers with
ever increasing bandwidth, better quality, lower cost, and longer battery
life. Cellular phones by far constitute the biggest market for wireless
systems, but wireless local area network systems are also growing at a
very fast pace.
Until very recently two limitations of wireless local area network
(WLAN) systems have been low data rate and high cost. The former
is being overcome by allocating new frequency bands for WLAN service.
Among these are the ISM band at 2.4 GHz and the U–NII band
at 5 GHz. New standards have been developed, with still others under
development, to take advantage of these frequency bands.
High integration in low cost technologies is the main step toward
reducing the cost of WLAN systems. The fast trend of CMOS scaling
makes it an attractive technology for low cost systems. However, to get
the required RF performance out of standard digital CMOS technologies,
new system architectures and circuit topologies need to be developed.
Careful studies of wireless architectures identify fundamental limitations
and allow modifications to improve performance while maintaining or
even increasing battery lifetime.
The increasing demand for wideband WLAN systems is the motivation
for studying here the design of a fully integrated CMOS receiver at
5 GHz. In this book we focus only on the frequency synthesizer and
describe how new architectures and circuit topologies enable us to reduce
the cost and power consumption while achieving high performance.