The 74HC/HCT4353 are high-speed Si-gate CMOS
devices. They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT4353 are triple 2-channel analog
multiplexers/demultiplexers with two common enable
inputs (E1 and E2) and a latch enable input (LE). Eachmultiplexer has two independent inputs/outputs (nY0 and
nY1), a common input/output (nZ) and select inputs (S1 to
S3).
Each multiplexer/demultiplexer contains two bidirectional
analog switches, each with one side connected to an
independent input/output (nY0 and nY1) and the other side
connected to a common input/output (nZ).
With E1 LOW and E2 HIGH, one of the two switches is
selected (low impedance ON-state) by S1 to S3.
The data at the select inputs may be latched by using the
active LOW latch enable input (LE). When LE is HIGH, the
latch is transparent. When either of the two enable inputs,
E1 (active LOW) and E2 (active HIGH), is inactive, all
analog switches are turned off.
VCC and GND are the supply voltage pins for the digital
control inputs (S1 to S3, LE, E1 and E2). The VCC to GND
ranges are 2.0 to 10.0 V for HC and 4.5 to 5.5 V for HCT.
The analog inputs/outputs (nY0 and nY1, and nZ) can
swing between VCC as a positive limit and VEE as a
negative limit. VCC ? VEE may not exceed 10.0 V.
For operation as a digital multiplexer/demultiplexer, VEE is
connected to GND (typically ground).