The Microchip Technology Inc. 28C64A is a CMOS 64K nonvolatile
electrically Erasable PROM. The 28C64A is
accessed like a static RAM for the read or write cycles without
the need of external components. During a “byte write”,
the address and data are latched internally, freeing the microprocessor
address and data bus for other operations. Following
the initiation of write cycle, the device will go to a busy
state and automatically clear and write the latched data using
an internal control timer. To determine when the write cycle
is complete, the user has a choice of monitoring the Ready/
Busy output or using Data polling. The Ready/Busy pin is an
open drain output, which allows easy configuration in wiredor
systems. Alternatively, Data polling allows the user to read
the location last written to when the write operation is complete.
CMOS design and processing enables this part to be
used in systems where reduced power consumption and reliability
are required. A complete family of packages is offered
to provide the utmost flexibility in applications.