資料介紹
The PCA9513 and PCA9514 are hot swappable I2C and SMBus
buffers that allows I/O card insertion into a live backplane without
corrupting the data and clock buses. Control circuitry prevents the
backplane from being connected to the card until a stop command
or bus idle occurs on the backplane without bus contention on the
card. When the connection is made, the PCA9511, PCA9513, and
PCA9514 provides bi-directional buffering, keeping the backplane
and card capacitances isolated.
Rise time accelerator circuitry allows the use of weaker DC pull-up
currents while still meeting rise time requirements. The PCA9513
and PCA9514 incorporate a digital ENABLE input pin, which
enables the device when asserted HIGH and forces the device into
a low current mode when asserted LOW, and an open-drain READY
output pin, which indicates that the backplane and card sides are
connected together (HIGH) or not (LOW).
The PCA9513 supplies a 92 mA current source to SCLIN and SDAIN
in lieu of using pull-up resistors for PICMG backplane applications.
Including the current source in the device provides for a consistent
RC time constant as cards are removed and inserted into the
backplane. The current source is high-impedance whenever the pin
voltage is greater than the part VCC.
PCA9513 and PCA9514 rise time accelerator threshold is 0.8 V to
provide improved noise margin over the PCA9510 and PCA9511.
The dynamic offset design of the PCA9510/11/12/13/14 I/O drivers
allow them to be connected to another PCA9510/11/12/13/14 device
in series or in parallel and to the A side of the PCA9517. The
PCA9510/11/12/13/14 can not connect to the static offset I/Os used
on the PCA9515/15A/16/16A/17 B side and PCA9518.
APPLICATION
? cPCI, VME, AdvancedTCA cards and other multi-point backplane
cards that are required to be inserted or removed from an
operating system
buffers that allows I/O card insertion into a live backplane without
corrupting the data and clock buses. Control circuitry prevents the
backplane from being connected to the card until a stop command
or bus idle occurs on the backplane without bus contention on the
card. When the connection is made, the PCA9511, PCA9513, and
PCA9514 provides bi-directional buffering, keeping the backplane
and card capacitances isolated.
Rise time accelerator circuitry allows the use of weaker DC pull-up
currents while still meeting rise time requirements. The PCA9513
and PCA9514 incorporate a digital ENABLE input pin, which
enables the device when asserted HIGH and forces the device into
a low current mode when asserted LOW, and an open-drain READY
output pin, which indicates that the backplane and card sides are
connected together (HIGH) or not (LOW).
The PCA9513 supplies a 92 mA current source to SCLIN and SDAIN
in lieu of using pull-up resistors for PICMG backplane applications.
Including the current source in the device provides for a consistent
RC time constant as cards are removed and inserted into the
backplane. The current source is high-impedance whenever the pin
voltage is greater than the part VCC.
PCA9513 and PCA9514 rise time accelerator threshold is 0.8 V to
provide improved noise margin over the PCA9510 and PCA9511.
The dynamic offset design of the PCA9510/11/12/13/14 I/O drivers
allow them to be connected to another PCA9510/11/12/13/14 device
in series or in parallel and to the A side of the PCA9517. The
PCA9510/11/12/13/14 can not connect to the static offset I/Os used
on the PCA9515/15A/16/16A/17 B side and PCA9518.
APPLICATION
? cPCI, VME, AdvancedTCA cards and other multi-point backplane
cards that are required to be inserted or removed from an
operating system
PCA
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