Second-Generation PLD Architecture
Choice of Operating Speeds
TIBPAL22V10AC . . . 25 ns Max
TIBPAL22V10AM . . . 30 ns Max
TIBPAL22V10C . . . 35 ns Max
Increased Logic Power?Up to 22 Inputs
and 10 Outputs
Increased Product Terms?Average of 12
Per Output
Variable Product Term Distribution
Allows More Complex Functions to Be
Implemented
Each Output Is User Programmable for
Registered or Combinational Operation,
Polarity, and Output Enable Control
TTL-Level Preload for Improved Testability
Extra Terms Provide Logical Synchronous
Set and Asynchronous Reset Capability
Fast Programming, High Programming
Yield, and Unsurpassed Reliability Ensured
Using Ti-W Fuses
AC and DC Testing Done at the Factory
Utilizing Special Designed-In Test Features
Dependable Texas Instruments Quality and
Reliability
Package Options Include Both Plastic and
Ceramic Chip Carriers in Addition to Plastic
and Ceramic DIPs
Functionally Equivalent to AMDs
AMPAL22V10 and AMPAL22V10A