Abstract 2
1 Introduction 3
1.1 Motivation    . . . 3
1.1.1 Scope of theWork   5
1.2 State of the Art    6
1.2.1 Broadband Amplifiers   . 6
1.2.2 Devices    7
2 InP-based Double Heterojunction Bipolar Transistor 11
2.1 Operating Principle   . . . 12
2.2 Technology    . . 16
2.2.1 Active Devices   . 16
2.2.2 Passive Structures   18
2.3 Layer Structure Optimization   . 19
2.3.1 Initial Layer Structure (A)   . . . . 19
2.3.2 Improved Layer Structure (B)   . . 24
2.3.3 Optimized Layer Structure (C)   . 28
2.3.4 Summary   . . . . 33
2.4 Transistor Layout Optimization   34
2.4.1 EmitterWidth Design   . 36
2.4.2 Base ContactWidth Design   . . . 38
2.4.3 Collector Contact Design   40
2.4.4 Emitter Length Design   . 40
2.4.5 Summary   . . . . 43
3 Transistor Models 45
3.1 Large-SignalModels   . . 46
3.1.1 Gummel-PoonModel   . . 46
3.1.2 AlternativeModels   47
3.1.3 UCSDModel   . . 47
3.2 UCSDModel Extraction   49
3.2.1 Diode Parameters   49
3.2.2 Resistances   . . . 51
3.2.3 Junction Capacitances   . 55
3.2.4 Transit and Delay Times   56
3.3 Small-SignalModel   . . . 60
3.3.1 Model Extraction   60
3.3.2 Investigation of Transistors   . . . . 63
3.4 Summary    . . . 68
4 Methods of Broadband Amplifier Characterization 69
4.1 Figures ofMerit    69
4.1.1 Bandwidth  . . . . 69
4.1.2 Group Delay   . . . 71
4.1.3 Output Power   . . 71
4.2 Small-Signal-Characterization (S-Parameter)  . . . 72
4.3 Large-Signal-Characterization   . 73
4.3.1 Output Power   . . 73
4.3.2 Signal Distortion (Eye-Diagram)   . 74
5 Realization of Compact Lumped Amplifiers 77
5.1 Design Considerations   . 77
5.2 Realized Amplifiers   . . . 79
5.2.1 Comparison of Lumped Amplifier Approaches  . . 79
5.2.2 High-Gain Amplifier for 40 Gbit/s   82
5.2.3 Low-Power Amplifier for 80 Gbit/s  . . . . 85
5.3 Output Power Limit   . . 87
6 Distributed Amplifiers for 80 Gbit/s 91
6.1 Design Considerations   . 92
6.1.1 Gain Cell Design Concepts   . . . . 93
6.1.2 Attenuation Compensation   . . . . 93
6.1.3 Coplanar and Microstrip Transmission Lines  96
6.1.4 Transmission Line Termination   . 97
6.1.5 Linear andMatrix Design   . . . . 98
6.1.6 Single-ended and Differential Design  . . . 98
6.2 Realized Amplifiers   . . . 99
6.2.1 Low-Power 100 GHz Bandwidth Amplifier  99
6.2.2 Tunable Amplifier for Loss Compensation  103
6.2.3 High-Power Amplifier for 80 Gbit/s  . . . . 108
6.3 Summary    . . . 114
7 Conclusion and Outlook 115
A Extracted Large-Signal Model Parameters 117
Bibliography 119
List of Abbreviations 129
Acknowledgments 131
Curriculum Vitae 132