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電子發(fā)燒友網(wǎng)>電子資料下載>模擬數(shù)字>嵌入式系統(tǒng)的高速CMOS模擬數(shù)字轉(zhuǎn)換器

嵌入式系統(tǒng)的高速CMOS模擬數(shù)字轉(zhuǎn)換器

2009-07-20 | rar | 19 | 次下載 | 3積分

資料介紹

This book results from of a large European project started in 1997, whose
goal is to promote the further development and the faster and wider industrial
use of advanced design methods for reducing the power consumption
of electronic systems.
Low power design became crucial with the wide spread of portable information
and communication terminals, where a small battery has to last
for a long period. High performance electronics, in addition, suffers from a
permanent increase of the dissipated power per square millimeter of silicon,
due to the increasing clock-rates, which causes cooling and reliability problems
or otherwise limits the performance.
The European Union's Information Technologies Programme 'Esprit' did
therefore launch a 'Pilot action for Low Power Design', which eventually
grew to 19 R&D projects and one coordination project, with an overall
budget of 14 million EURO. It is meanwhile known as European Low Power
Initiative for Electronic System Design (ESD-LPD) and will be completed in
the year 2002. It involves to develop or demonstrate new design methods for
power reduction, while the coordination project takes care that the methods,
experiences and results are properly documented and publicised.
The initiative addresses low power design at various levels. This includes
system and algorithmic level, instruction set processor level, custom processor
level, RT-level, gate level, circuit level and layout level. It covers data
dominated and control dominated as well as asynchronous architectures. 10
projects deal mainly with digital, 7 with analog and mixed-signal, and 2
with software related aspects. The principal application areas are communication,
medical equipment and e-commerce devices.
The following list describes the objectives of the 20 projects. It is sorted by
decreasing funding budget.

CMOS
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