Protecting MCU I/O Lines from ESD and Other Transients

　　要做一些有用的，微控制器（MCU）必須連接到其他設(shè)備。這種連接是通過輸入/輸出（I / O）引腳。更多的時間比不，這些天引腳是多功能的，可以連接到一個A / DS，D /作為，線性函數(shù)（如運算放大器和比較器），電壓參考，以及更多。因此，對于設(shè)計工程師，保護這些I / OS免受潛在破壞性的靜態(tài)費用和其他類似的威脅是非常重要的。

　　在為MCU建立適當?shù)谋Ｗo時，工程師們發(fā)現(xiàn)他們多年來依賴的特性突然變得不那么有效，他們被迫重新審視過去的問題。為什么？主要是由于市場壓力，以降低其產(chǎn)品的成本，半導(dǎo)體制造商結(jié)合了更高水平的整合與工藝幾何的持續(xù)萎縮，使芯片尺寸更小。因此，實施必要的暫態(tài)免疫保護，以防止由于電源和信號線的瞬態(tài)故障已變得越來越困難。

　　When geometries and IC feature sizes were larger， I/O pads had a lot of area for meaty drivers and good protection against ESD-induced damage. In the effort to improve yield， smaller die and pads are used， which， just by their nature， are less able to take a hit to protect a micro. As a rule of thumb， an electrostatic charge will always arc through the shortest possible path， and delicate micro I/O lines lead to more static discharge hits getting through.

　　This article looks at the different levels of MCU immunity to electrical fast transients （EFT）， electrostatic discharge （ESD）， and other events of short duration and suggests practical hardware and design techniques that can provide cost-effective ways of protecting microcontroller I/O lines. All parts， data sheets， tutorials， and development systems referenced here can be found online at Digi-Key‘s website.