The LPC1759/58/56/54/52/51 are ARM Cortex-M3 based microcontrollers for embedded applications featuring a high level of integration and low power consumption. The ARM Cortex-M3 is a next generation core that offers system enhancements such as enhanced debug features and a higher level of support block integration. The LPC1758/56/57/54/52/51 operate at CPU frequencies of up to 100 MHz. The LPC1759 operates at CPU frequencies of up to 120 MHz. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branching. The peripheral complement of the LPC1759/58/56/54/52/51 includes up to 512 kB of flash memory， up to 64 kB of data memory， Ethernet MAC， USB Device/Host/OTG interface， 8-channel general purpose DMA controller， 4 UARTs， 2 CAN channels， 2 SSP controllers， SPI interface， 2 I2C-bus interfaces， 2-input plus 2-output I2S-bus interface， 6 channel 12-bit ADC， 10-bit DAC， motor control PWM， Quadrature Encoder interface， 4 general purpose timers， 6-output general purpose PWM， ultra-low power Real-Time Clock （RTC） with separate battery supply， and up to 52 general purpose I/O pins.