進行母嬰心電信號分離需要大量數據存儲和運算，實時性要求高，要求有一個能夠滿足存儲容量和計算時間需求的硬件平臺，故本系統采用基于ARM 核的32 位低功耗微處理器S3C44B0X 作為核心，在嵌入式操作系統uC/OS-Ⅱ下實現胎兒心電信號的數據采集分離與顯示；論文詳細介紹了系統硬件電路的主要接口設計和軟件實現的方法。
關鍵詞 μC/OS-Ⅱ 胎兒心電 ARM微處理器 系統移植
Abstract Realizing the separation algorithm of FECG needs mass data storage and processing, and high real-time performance,which demands a hardware platform statisfying the storage capacity and the computing demand,so the system uses the 32-bit low-power S3C44B0X micro-processor on the basis of ARM nuclear as the core, and accomplishes the sampling and displaying of FECG with an embedded uC/OS-II operation system. At the same time , this project introduces particularly the main interface of system hardware circuit and software implementation means.
Keywords μC/OS-Ⅱ FECG ARM processor system transplantation