VHDL is a language for describing digital electronic systems. It arose
out of the United States Government’s Very High Speed Integrated Circuits
(VHSIC) program, initiated in 1980. In the course of this program, it
became clear that there was a need for a standard language for describing
the structure and function of integrated circuits (ICs). Hence the VHSIC
Hardware Description Language (VHDL) was developed, and subsequently
adopted as a standard by the Institute of Electrical and Electronic
Engineers (IEEE) in the US.
VHDL is designed to fill a number of needs in the design process.
Firstly, it allows description of the structure of a design, that is how it is
decomposed into sub-designs, and how those sub-designs are
interconnected. Secondly, it allows the specification of the function of
designs using familiar programming language forms. Thirdly, as a
result, it allows a design to be simulated before being manufactured, so that
designers can quickly compare alternatives and test for correctness without
the delay and expense of hardware prototyping.