TI公司的TIDA-01425是基于DRA710信息娛樂(lè)應(yīng)用處理器的帶以太網(wǎng)和CAN的汽車(chē)網(wǎng)關(guān)參考設(shè)計(jì),具有100BASE-T1汽車(chē)以太網(wǎng),100BASE-TX和CAN PHYs,可以通過(guò)冷啟動(dòng),搶跑和甩負(fù)荷等方式工作,降低EMI功率級(jí)和電池接反保護(hù),能增加帶寬和網(wǎng)關(guān)的處理能力,主要用在應(yīng)用處理器模塊,汽車(chē)網(wǎng)關(guān),構(gòu)建設(shè)備控制單元,自由空間傳感器,鐵路運(yùn)輸馬達(dá)控制以及車(chē)輛乘員檢測(cè)傳感器.本文介紹了DRA710信息娛樂(lè)應(yīng)用處理器主要特性和框圖,汽車(chē)網(wǎng)關(guān)參考設(shè)計(jì)TIDA-01425主要特性,框圖,電路圖,材料清單和 PCB設(shè)計(jì)圖.

The DRA71x processor is offered in a 538-ball, 17×17-mm, 0.65-mm ball pitch (0.8mm spacing rules canbe used on signals) with Via Channel? Array (VCA) technology, ball grid array (BGA) package.The architecture is designed to deliver high-performance concurrencies for automotive applications in acost-effective solution, providing full scalability from the DRA75x ("Jacinto 6 EP" and "Jacinto 6 Ex"),DRA74x "Jacinto 6" and DRA72x "Jacinto 6 Eco" family of infotainment processors, including graphics,voice, HMI, multimedia and smartphone projection mode capabilities.

Programmability is provided by a single-core ARM Cortex-A15 RISC CPU with Neon? extensions and aTI C66x VLIW floating-point DSP core. The ARM processor lets developers keep control functionsseparate from other algorithms programmed on the DSP and coprocessors, thus reducing the complexityof the system software.

Additionally, TI provides a complete set of development tools for the ARM, and DSP, including Ccompilers and a debugging interface for visibility into source code execution.The DRA71x Jacinto 6 Entry processor family is qualified according to the AEC-Q100 standard.The device features a simplified power supply rail mapping which enables lower cost PMIC solutions.

DRA710主要特性:

? Architecture Designed for InfotainmentApplications
? Video, Image, and Graphics Processing Support
– Full-HD Video (1920 × 1080p, 60 fps)
– Multiple Video Input and Video Output
– 2D and 3D Graphics
? ARM? Cortex?-A15 Microprocessor Subsystem
? C66x Floating-Point VLIW DSP
– Fully Object-Code Compatible With C67x andC64x+
– Up to Thirty-two 16 × 16-Bit Fixed-PointMultiplies per Cycle
? Up to 512KB of On-Chip L3 RAM
? Level 3 (L3) and Level 4 (L4) Interconnects
? DDR3/DDR3L Memory Interface (EMIF) Module
– Supports up to DDR-1333 (667 MHz)
– Up to 2GB Across Single Chip Select
? Dual ARM? Cortex?-M4 Image Processing Units(IPU)
? IVA-HD Subsystem
? Display Subsystem
– Display Controller With DMA Engine and up toThree Pipelines
– HDMI? Encoder: HDMI 1.4a and DVI 1.0Compliant
? 2D-Graphics Accelerator (BB2D) Subsystem
– Vivante? GC320 Core
? Video Processing Engine (VPE)
? Single-Core PowerVR? SGX544 3D GPU
? One Video Input Port (VIP) Module
– Support for up to Four Multiplexed Input Ports
? General-Purpose Memory Controller (GPMC)
? Enhanced Direct Memory Access (EDMA)Controller
? 2-Port Gigabit Ethernet (GMAC)
– Up to Two External Ports
? Sixteen 32-Bit General-Purpose Timers
? 32-Bit MPU Watchdog Timer
? Six High-Speed Inter-Integrated Circuit (I2C) Ports
? HDQ?/1-Wire? Interface
? Ten Configurable UART/IrDA/CIR Modules
? Four Multichannel Serial Peripheral Interfaces(McSPI)
? Quad SPI Interface (QSPI)
? Media Local Bus Subsystem (MLBSS)
? Eight Multichannel Audio Serial Port (McASP)Modules
? SuperSpeed USB 3.0 Dual-Role Device
? High-Speed USB 2.0 Dual-Role Device
? High-Speed USB 2.0 On-The-Go
? Four MultiMedia Card/Secure Digital/Secure DigitalInput Output Interfaces (MMC/SD/SDIO)
? PCI Express? 3.0 Subsystems With Two 5-GbpsLanes
– One 2-lane Gen2-Compliant Port
– or Two 1-lane Gen2-Compliant Ports
? Dual Controller Area Network (DCAN) Modules
– CAN 2.0B Protocol
? MIPI? CSI-2 Camera Serial Interface
? Up to 186 General-Purpose I/O (GPIO) Pins
? Power, Reset, and Clock Management
? On-Chip Debug With CTools Technology
? 28-nm CMOS Technology
? 17 mm × 17 mm, 0.65-mm Pitch, 538-Pin BGA(CBD)

DRA710應(yīng)用:

? Human-Machine Interface (HMI)
? Navigation
? Digital and Analog Radio
? Multimedia Playback
? Automotive Display Audio Systems
? Automotive Entry Navigation and MultimediaSystems
? Automotive Digital Cluster Systems

圖1.DRA710框圖

帶以太網(wǎng)和CAN汽車(chē)網(wǎng)關(guān)參考設(shè)計(jì)TIDA-01425

The TIDA-01425 is a subsystem reference design for automotive gateways focused on increasing bandwidth and processing power in gateway applications. The design implements Ethernet physical layer transceivers (PHYs) for increased bandwidth along with an automotive processor for greater processing capabilities allowing automotive gateways to pass more data at higher speeds. Furthermore, the design offers a starting point for a full automotive gateway design with a full power tree, CAN PHYs, and components selected with automotive requirements and emission specifications in mind to simplify the design process.

The TIDA-01425 is a reference design for automotive gateways focused on increasing bandwidth andprocessing power in gateway applications. The design implements Ethernet PHYs for increased bandwidthalong with an automotive processor for greater processing capabilities. Furthermore, the design offers anexcellent starting point for a full automotive gateway design. All components were selected based onautomotive requirements and emission specifications in mind. The TIDA-01425 implements four total　PHYs: two ethernet PHYs and two controller area network (CAN) PHYs. A 100BASE-T1 PHY allows forEthernet communication over a single twisted-pair cable, which lowers the wiring weight within the vehiclewhile also boosting overall bandwidth (100 Mb/s). Along with the single 100BASE-T1 PHY, a 100BASE-TXPHY is utilized to allow for diagnostic readings from the various electronic systems of a vehicle. In additionto the Ethernet PHYs, two CAN PHYs allow for communication to CAN buses within the automobile.

Finally, the automotive processor allows for faster processing speeds to keep up with the increasedbandwidth and also offers software scalability. Furthermore, through software, the processor can improveoverall vehicle security.

參考設(shè)計(jì)TIDA-01425主要特性:

Processor based system
100BASE-T1 automotive ethernet
100BASE-TX and CAN PHYs
Operates off automotive battery
Designed to operate through cold crank, jump start, and load dump
Reduced EMI power stages
Reverse battery protection

參考設(shè)計(jì)TIDA-01425應(yīng)用:

Applications Processor Module
Automotive Gateway
Control Units for Construction Equipment
Free Space Sensor
Motor Control for Rail Transport
Vehicle Occupant Detection Sensor

圖2.參考設(shè)計(jì)TIDA-01425外形圖
參考設(shè)計(jì)TIDA-01425主要系統(tǒng)指標(biāo):

圖3.參考設(shè)計(jì)TIDA-01425框圖

圖4.參考設(shè)計(jì)TIDA-01425電路圖(1)

圖5.參考設(shè)計(jì)TIDA-01425電路圖(2)

圖6.參考設(shè)計(jì)TIDA-01425電路圖(3)

圖7.參考設(shè)計(jì)TIDA-01425電路圖(4)

圖8.參考設(shè)計(jì)TIDA-01425電路圖(5)

圖9.參考設(shè)計(jì)TIDA-01425電路圖(6)

圖10.參考設(shè)計(jì)TIDA-01425電路圖(7)

圖11.參考設(shè)計(jì)TIDA-01425電路圖(8)

圖12.參考設(shè)計(jì)TIDA-01425電路圖(9)

圖13.參考設(shè)計(jì)TIDA-01425電路圖(10)

圖14.參考設(shè)計(jì)TIDA-01425電路圖(11)
參考設(shè)計(jì)TIDA-01425材料清單:

圖15.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(1)

圖16.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(2)

圖17.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(3)

圖18.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(4)

圖19.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(5)

圖20.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(6)

圖21.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(7)

圖22.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(8)

圖23.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(9)

圖24.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(10)

圖25.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(11)

圖26.參考設(shè)計(jì)TIDA-01425 PCB設(shè)計(jì)圖(12)
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